GPIO Register map¶
Created with Corsair v1.0.4.
Conventions¶
| Access mode | Description |
|---|---|
| rw | Read and Write |
| rw1c | Read and Write 1 to Clear |
| rw1s | Read and Write 1 to Set |
| ro | Read Only |
| roc | Read Only to Clear |
| roll | Read Only / Latch Low |
| rolh | Read Only / Latch High |
| wo | Write only |
| wosc | Write Only / Self Clear |
Register map summary¶
Base address: 0x10000100
| Name | Address | Description |
|---|---|---|
| RGPIO_IN | 0x00000000 | Latched value of general-purpose input pins. |
| RGPIO_OUT | 0x00000004 | General-purpose output pin values. |
| RGPIO_OE | 0x00000008 | General-purpose pins output enables. |
| RGPIO_INTE | 0x0000000c | General-purpose pin interrupt enables. |
| RGPIO_PTRIG | 0x00000010 | Trigger IRQ on positive edge. |
| RGPIO_CTRL_STATUS | 0x00000018 | GPIO control and status register |
| RGPIO_INTS | 0x0000001c | GPIO interrupt status register. |
| RGPIO_ECLK | 0x00000020 | Latch on gp_clk input signal. |
| RGPIO_NEC | 0x00000024 | Latch on gp_clk negative edge. Relevant only if RGPIO_ECLK is set. |
RGPIO_IN¶
Latched value of general-purpose input pins.
Address offset: 0x00000000
Reset value: 0x00000000
| Name | Bits | Mode | Reset | Description |
|---|---|---|---|---|
| PINS | 31:0 | ro | 0x00000000 | Latched value of general-purpose input pins. |
Back to Register map.
RGPIO_OUT¶
General-purpose output pin values.
Address offset: 0x00000004
Reset value: 0x00000000
| Name | Bits | Mode | Reset | Description |
|---|---|---|---|---|
| PINS | 31:0 | rw | 0x00000000 | General-purpose output pin values. |
Back to Register map.
RGPIO_OE¶
General-purpose pins output enables.
Address offset: 0x00000008
Reset value: 0x00000000
| Name | Bits | Mode | Reset | Description |
|---|---|---|---|---|
| PINS | 31:0 | rw | 0x00000000 | General-purpose pins output enables. |
Back to Register map.
RGPIO_INTE¶
General-purpose pin interrupt enables.
Address offset: 0x0000000c
Reset value: 0x00000000
| Name | Bits | Mode | Reset | Description |
|---|---|---|---|---|
| PINS | 31:0 | rw | 0x00000000 | General-purpose pins interrupt enables. |
Back to Register map.
RGPIO_PTRIG¶
Trigger IRQ on positive edge.
Address offset: 0x00000010
Reset value: 0x00000000
| Name | Bits | Mode | Reset | Description |
|---|---|---|---|---|
| PINS | 31:0 | rw | 0x00000000 | Trigger IRQ on positive edge if set, on negative edge if cleared. |
Back to Register map.
RGPIO_CTRL_STATUS¶
GPIO control and status register
Address offset: 0x00000018
Reset value: 0x00000000
| Name | Bits | Mode | Reset | Description |
|---|---|---|---|---|
| - | 31:2 | - | 0x0000000 | Reserved |
| INTS | 1 | ro | 0x0 | Interrupt status |
| INTE | 0 | rw | 0x0 | Interrupt enabled |
Back to Register map.
RGPIO_INTS¶
GPIO interrupt status register.
Address offset: 0x0000001c
Reset value: 0x00000000
| Name | Bits | Mode | Reset | Description |
|---|---|---|---|---|
| PINS | 31:0 | rw | 0x00000000 | Interrupt status - Write 0 to clear. |
Back to Register map.
RGPIO_ECLK¶
Latch on gp_clk input signal.
Address offset: 0x00000020
Reset value: 0x00000000
| Name | Bits | Mode | Reset | Description |
|---|---|---|---|---|
| PINS | 31:0 | rw | 0x00000000 | When set, the gp_clk input signal is used to latch pin. |
Back to Register map.
RGPIO_NEC¶
Latch on gp_clk negative edge. Relevant only if RGPIO_ECLK is set.
Address offset: 0x00000024
Reset value: 0x00000000
| Name | Bits | Mode | Reset | Description |
|---|---|---|---|---|
| PINS | 31:0 | rw | 0x00000000 | When set, gp_clk is active on negative edge, when cleared on positive edge. |
Back to Register map.