Serial Port
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Wbuart32 Repo, BoxLambda fork,
boxlambdabranch: https://github.com/epsilon537/wbuart32 -
Wbuart32 Submodule in the BoxLambda Directory Tree: boxlambda/sub/wbuart32/
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Wbuart Component in the BoxLambda Directory Tree: boxlambda/gw/components/wbuart
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Wbuart Top-Level: sub/wbuart32/rtl/wbuart.v
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Wbuart Spec:: sub/wbuart32/doc/spec.pdf
ZipCPU comes to the rescue again with a UART implementation with a Wishbone interface. The BoxLambda variant of the wbuart core contains modifications for enabling and clearing specific interrupt events. These modifications are documented in a separate section of the core's spec.
The wbuart core is instantiated without hardware flow control.
Wbuart Clock Frequency
The Wbuart core is part of the 50MHz System Clock Domain.