Serial Port
-
Wbuart32 Repo, BoxLambda fork, boxlambda branch: https://github.com/epsilon537/wbuart32
-
Wbuart32 Submodule in the BoxLambda Directory Tree: boxlambda/sub/wbuart32/
-
Wbuart Component in the BoxLambda Directory Tree: boxlambda/gw/components/wbuart
-
Wbuart Top-Level: sub/wbuart32/rtl/wbuart.v
-
Wbuart Spec:: sub/wbuart32/doc/spec.pdf
ZipCPU comes to the rescue once again with a UART implementation with a Wishbone interface. The BoxLambda variant of the wbuart core contains some modifications for enabling and clearing of specific interrupt events. These modifications are documented in a separate section of the core's spec.
The wbuart core is instantiated without hardware flow control.
Wbuart Clock Frequency
The Wbuart core is part of the 50MHz System Clock Domain.